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Area Efficient Bus Encoding Technique for Minimizing Simultaneous Switching Noise (SSN)., , and . ISCAS, page 1129-1132. IEEE, (2007)A novel, coupling driven, low power bus coding technique for minimizing capacitive crosstalk in VLSI interconnects., , and . ISCAS, IEEE, (2006)Nonlinear Sequence Transformation-Based Continuous-Time Wavelet Filter Approximation., and . CSSP, 37 (3): 965-983 (2018)Modeling of EXG (ECG, EMG and EEG) non-idealities using MATLAB., and . CISP-BMEI, page 1584-1589. IEEE, (2016)A novel deep submicron low power bus coding technique., , and . Circuits, Signals, and Systems, page 154-159. IASTED/ACTA Press, (2005)VLSI Implementation of O(n*n) Sorting Algorithms And Their Hardware Comparison., , , and . CSC, page 74-77. CSREA Press, (2005)High-Throughput Montgomery Modular Multiplication., and . VLSI-SoC, page 58-62. IEEE, (2006)An Extension to DNA Based Fredkin Gate Circuits: Design of Reversible Sequential Circuits using Fredkin Gates, and . CoRR, (2006)A 7-Cell, Stackable, Li-Ion Monitoring and Active/Passive Balancing IC With In-Built Cell Balancing Switches for Electric and Hybrid Vehicles., , , , , , and . IEEE Trans. Ind. Informatics, 16 (5): 3335-3344 (2020)T2A: Analog and RF circuits.. SoCC, page 1. IEEE, (2017)