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Stochastic nanoscale addressing for logic., and . NANOARCH, page 59-64. IEEE Computer Society, (2010)Nanowire addressing with randomized-contact decoders., and . ICCAD, page 735-742. ACM, (2006)Evaluation of design strategies for stochastically assembled nanoarray memories., , and . JETC, 1 (2): 73-108 (2005)Analysis of a Mask-Based Nanowire Decoder., , and . ISVLSI, page 6-13. IEEE Computer Society, (2005)Analysis of Mask-Based Nanowire Decoders., and . IEEE Trans. Computers, 57 (2): 175-187 (2008)Nanowire Addressing in the Face of Uncertainty., and . ISVLSI, page 225-230. IEEE Computer Society, (2006)Decoding of Stochastically Assembled Nanoarrays., , and . ISVLSI, page 11-18. IEEE Computer Society, (2004)A framework for coded computation., and . ISIT, page 2342-2346. IEEE, (2008)Nanowire addressing with randomized-contact decoders., and . Theor. Comput. Sci., 408 (2-3): 241-261 (2008)Reliable Computing at the Nanoscale.. Brown University, USA, (2010)