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S2-PM: semi-supervised learning for efficient performance modeling of analog and mixed signal circuits., , и . ASP-DAC, стр. 268-273. ACM, (2019)Error-Feedback Mismatch Error Shaping for High-Resolution Data Converters., , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (4): 1342-1354 (2019)10.4 A 3.7mW 12.5MHz 81dB-SNDR 4th-Order CTDSM with Single-OTA and 2nd-Order NS-SAR., , , , , , , и . ISSCC, стр. 170-172. IEEE, (2021)MAGICAL 1.0: An Open-Source Fully-Automated AMS Layout Synthesis Framework Verified With a 40-nm 1GS/s Δ∑ ADC., , , , , , и . CICC, стр. 1-2. IEEE, (2021)Towards Decrypting the Art of Analog Layout: Placement Quality Prediction via Transfer Learning., , , , , , и . DATE, стр. 496-501. IEEE, (2020)A SAR ADC with Reduced kT/C Noise by Decoupling Noise PSD and BW., , , , , , и . VLSI Circuits, стр. 1-2. IEEE, (2020)A 2.4-GHz ΔΣ Fractional-N Synthesizer with Space-Time Averaging for Noise Reduction., , , , , , , и . CICC, стр. 1-4. IEEE, (2019)A 0.37mm2 250kHz-BW 95dB-SNDR CTDSM with Low-Cost 2nd-order Vector-Quantizer DEM., , , , , , , и . CICC, стр. 1-2. IEEE, (2022)A 150kHz-BW 15-ENOB Incremental Zoom ADC with Skipped Sampling and Single Buffer Embedded Noise-Shaping SAR Quantizer., , , , , , и . ISSCC, стр. 176-177. IEEE, (2023)A 10-bit 120-MS/s SAR ADC With Reference Ripple Cancellation Technique., , , , , , , , и . IEEE J. Solid State Circuits, 55 (3): 680-692 (2020)