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S3DET: Detecting System Symmetry Constraints for Analog Circuits with Graph Similarity., , , , , , , , и . ASP-DAC, стр. 193-198. IEEE, (2020)A 0.025-mm2 0.8-V 78.5dB-SNDR VCO-Based Sensor Readout Circuit in a Hybrid PLL-ΔΣM Structure., , , , , , , , и . CICC, стр. 1-3. IEEE, (2019)A Scaling Compatible, Synthesis Friendly VCO-based Delta-sigma ADC Design and Synthesis Methodology., , , и . DAC, стр. 12:1-12:6. ACM, (2017)Hierarchical and Analytical Placement Techniques for High-Performance Analog Circuits., , , , и . ISPD, стр. 55-62. ACM, (2017)Analog Placement Constraint Extraction and Exploration with the Application to Layout Retargeting., , , и . ISPD, стр. 98-105. ACM, (2018)MAGICAL: Toward Fully Automated Analog IC Layout Leveraging Human and Machine Intelligence: Invited Paper., , , , , , , и . ICCAD, стр. 1-8. ACM, (2019)Exploiting Wavelength Division Multiplexing for Optical Logic Synthesis., , , , , , и . DATE, стр. 1567-1570. IEEE, (2019)A 60-fJ/step 11-ENOB VCO-based CTDSM Synthesized from Digital Standard Cell Library., , , и . CICC, стр. 1-4. IEEE, (2019)Hardware-software co-design of slimmed optical neural networks., , , , , , , , и . ASP-DAC, стр. 705-710. ACM, (2019)Triple Patterning Aware Detailed Placement Toward Zero Cross-Row Middle-of-Line Conflict., , , и . ICCAD, стр. 396-403. IEEE, (2015)