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A 28 μW timing circuit for a 60 μm2 HV-CMOS pixel.

S. Moreno, O. Alonso, Á. Diéguez, E. Vilella, G. Casse, and J. Vossebeld. DCIS, page 1-6. IEEE, (2019)

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Eduardo Moreno

Carlos Moreno

Alexander Moreno

Moreno Andreatta

José Moreno

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TOR and PKA Pathways Synergize at the Level of the Ste11 Transcription Factor to Prevent Mating and Meiosis in Fission YeastN. Valbuena, and S. Moreno. PLoS ONE, 5 (7): e11514+ (Jul 9, 2010)A Compact Raster Lensless Microscope Based on a Microdisplay.A. Vilà, S. Moreno, J. Canals, and Á. Diéguez. Sensors, 21 (17): 5941 (2021)Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology.M. Doblas, G. Candón, X. Carril, M. Domínguez, E. Erra, A. González, C. Hernández, V. Jiménez, V. Kostalampros, R. Langarita and 38 other author(s). DCIS, page 1-6. IEEE, (2023)A 28 μW timing circuit for a 60 μm2 HV-CMOS pixel.S. Moreno, O. Alonso, Á. Diéguez, E. Vilella, G. Casse, and J. Vossebeld. DCIS, page 1-6. IEEE, (2019)A 72-bin in-pixel mixed-signal TDC for SPAD-based fluorescence lifetime measurements.S. Moreno, V. Moro, and Á. Diéguez. DCIS, page 1-5. IEEE, (2022)Pursuing the Diffraction Limit with Nano-LED Scanning Transmission Optical Microscopy.S. Moreno, J. Canals, V. Moro, N. Franch, A. Vilà, A. Romano-Rodriguez, J. Prades, D. Bezshlyakh, A. Waag, K. Kluczyk-Korch and 5 other author(s). Sensors, 21 (10): 3305 (2021)Associative Learning for Enhancing Autonomous Bots in Videogame Design.S. Moreno, M. Bedia, F. Serón, L. Castillo, and G. Isaza. DCAI, volume 217 of Advances in Intelligent Systems and Computing, page 361-368. Springer, (2013)Altimetric performance of the GEROS experiment at the ISS.A. Camps, H. Park, R. Onrubia, D. Pascual, J. Querol, A. Arroyo, J. Benito, A. Andrés-Beivide, S. Moreno, X. Ballesteros and 4 other author(s). IGARSS, page 5621-5624. IEEE, (2016)Analytical Communication Performance Models as a metric in the partitioning of data-parallel kernels on heterogeneous platforms.J. Rico-Gallego, J. Martín, C. Calvo-Jurado, S. Moreno-Álvarez, and J. Zapata. J. Supercomput., 75 (3): 1654-1669 (2019)Training deep neural networks: a static load balancing approach.S. Moreno-Álvarez, J. Haut, M. Paoletti, J. Rico-Gallego, J. Martín, and J. Plaza. J. Supercomput., 76 (12): 9739-9754 (2020)

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Disambiguation of "Moreno, Sergio"

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A 28 μW timing circuit for a 60 μm2 HV-CMOS pixel.

Please choose a person to relate this publication to

Eduardo Moreno

Carlos Moreno

Alexander Moreno

Moreno Andreatta

José Moreno

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Moreno, Sergio"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 28 μW timing circuit for a 60 μm2 HV-CMOS pixel.

Please choose a person to relate this publication to

Eduardo Moreno

Carlos Moreno

Alexander Moreno

Moreno Andreatta

José Moreno

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

A 28 μW timing circuit for a 60 μm2 HV-CMOS pixel.