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Disambiguation of "Perotti, Matteo"

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Spatz: Clustering Compact RISC-V-Based Vector Units to Maximize Computing Efficiency.

, , , and . CoRR, (2023)

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Eliana Perotti

Matteo Garavoglia

Marco Matteo

Matteo Bertini

Matteo Gabba

 

Other publications of authors with the same name

Near-Memory Parallel Indexing and Coalescing: Enabling Highly Efficient Indirect Access for SpMV., , , , and . CoRR, (2023)DARKSIDE: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training., , , , , , , and . CoRR, (2023)AXI-Pack: Near-Memory Bus Packing for Bandwidth-Efficient Irregular Workloads., , , , and . CoRR, (2022)Ara2: Exploring Single- and Multi-Core Vector Processing with an Efficient RVV1.0 Compliant Open-Source Processor., , , , and . CoRR, (2023)Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training., , , , , , , and . ESSCIRC, page 273-276. IEEE, (2022)MX: Enhancing RISC-V's Vector ISA for Ultra-Low Overhead, Energy-Efficient Matrix Multiplication., , , , and . CoRR, (2024)AXI-Pack: Near-Memory Bus Packing for Bandwidth-Efficient Irregular Workloads., , , , and . DATE, page 1-6. IEEE, (2023)Quark: An Integer RISC-V Vector Processor for Sub-Byte Quantized DNN Inference., , , , , , , , , and 1 other author(s). ISCAS, page 1-5. IEEE, (2023)A "New Ara" for Vector Computing: An Open Source Highly Efficient RISC-V V 1.0 Vector Processor Design., , , , , and . ASAP, page 43-51. IEEE, (2022)Yun: An Open-Source, 64-Bit RISC-V-Based Vector Processor With Multi-Precision Integer and Floating-Point Support in 65-nm CMOS., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (10): 3732-3736 (October 2023)