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Using Metaprogramming to Parallelize Functional Specifications.

, and . Parallel Process. Lett., 12 (2): 193-210 (2002)

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Counter Automata for Parameterised Timing Analysis of Box-Based Systems., and . FOPARA, volume 7177 of Lecture Notes in Computer Science, page 126-141. Springer, (2011)Transformation of Divide & Conquer to Nested Parallel Loops., and . PLILP, volume 1292 of Lecture Notes in Computer Science, page 95-109. Springer, (1997)Transforming Rapid Prototypes to Efficient Parallel Programs., and . Patterns and Skeletons for Parallel and Distributed Computing, Springer, (2003)The Static Parallelization of Loops and Recursions., , and . J. Supercomput., 11 (4): 333-353 (1997)Parallelization of Divide-and-Conquer by Translation to Nested Loops., and . J. Funct. Program., 9 (3): 279-310 (1999)Static Parallelization of Functional Programs: Elimination of Higher-Order Functions & Optimized Inlining., , , and . Euro-Par, volume 1685 of Lecture Notes in Computer Science, page 930-934. Springer, (1999)Using Metaprogramming to Parallelize Functional Specifications., and . Parallel Process. Lett., 12 (2): 193-210 (2002)Generating Message-passing Programs from Abstract Specifications by Partial Evaluation.. Parallel Process. Lett., 15 (3): 305-320 (2005)HDC: A Higher-Order Language for Divide-and-Conquer., and . Parallel Process. Lett., 10 (2/3): 239-250 (2000)A Transformational Approach which Combines Size Inference and Program Optimization., and . SAIG, volume 2196 of Lecture Notes in Computer Science, page 199-218. Springer, (2001)