( en | de | ru )

 

Disambiguation of "Burr, W."

Author of the publication

copydeleteadd this publication to your clipboard
Preparing for service export: the Case of M-GAMMA

, , , , , , and . Implementing International Services. A tailorable method for market assessment, modularization and process transfer, Gabler, (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Wolfgang Burr

Almut Burr

Wilhelm Burr

Reinhold Burr

Isolde Burr

 

Other publications of authors with the same name

Preparing for service export: the Case of M-GAMMA, , , , , , and . Implementing International Services. A tailorable method for market assessment, modularization and process transfer, Gabler, (2011)Exporting services with modular service architectures: Flexible methods for planning, validating, and implementing services for international markets., , , , , , , , and . Technologie - Innovation - Dienstleistung. Tagungsband 7. Dienstleistungstagung des BMBF, Berlin, BMBF, (2008)The MARIS Toolkit in a Nutshell, , , , , , , and . Implementing International Services. A tailorable method for market assessment, modularization and process transfer, Gabler, (2010)Preparing for service export: the Case of M-GAMMA, , , , , , and . Implementing International Services. A tailorable method for market assessment, modularization and process transfer, Gabler, (2010)The MARIS Toolkit in a Nutshell, , , , , , , and . Implementing International Services. A tailorable method for market assessment, modularization and process transfer, Gabler, (2011)Equivalent-accuracy accelerated neural-network training using analogue memory., , , , , , , , , and 4 other author(s). Nat., 558 (7708): 60-67 (2018)Non-volatile memory as hardware synapse in neuromorphic computing: A first look at reliability issues., , , and . IRPS, page 6. IEEE, (2015)Fair and Comprehensive Benchmarking of Machine Learning Processing Chips., , , , and . IEEE Des. Test, 39 (3): 18-27 (2022)A Heterogeneous and Programmable Compute-In-Memory Accelerator Architecture for Analog-AI Using Dense 2-D Mesh., , , , , , , , , and 5 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 31 (1): 114-127 (2023)Toward on-chip acceleration of the backpropagation algorithm using nonvolatile memory., , , , , , and . IBM J. Res. Dev., 61 (4-5): 11:1-11:11 (2017)