Author of the publication

Soft Error Resilient System Design through Error Correction.

, , , , and . VLSI-SoC (Selected Papers), volume 249 of IFIP, page 143-156. Springer, (2006)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Thermal-aware body bias modulation for high performance mobile core., , , , , , , and . ISOCC, page 147-150. IEEE, (2012)Robust platform design in advanced VLSI technologies., , , and . CICC, page 23-30. IEEE, (2005)Soft Error Resilient System Design through Error Correction., , , , and . VLSI-SoC (Selected Papers), volume 249 of IFIP, page 143-156. Springer, (2006)Framework for massively parallel testing at wafer and package test., and . ICCD, page 328-334. IEEE Computer Society, (2009)Sequential Element Design With Built-In Soft Error Resilience., , , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 14 (12): 1368-1378 (2006)Panel 4A: Apprentice - VTS edition: Season 3.. VTS, page 129. IEEE Computer Society, (2010)Multi-Frequency, Multi-Phase Scan Chain., and . ITC, page 323-330. IEEE Computer Society, (1994)Combinational Logic Soft Error Correction., , , , , and . ITC, page 1-9. IEEE Computer Society, (2006)XMAX: X-Tolerant Architecture for MAXimal Test Compression., and . ICCD, page 326-330. IEEE Computer Society, (2003)Session Abstract., and . VTS, page 292-293. IEEE Computer Society, (2006)