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3.3 A 0.5-to-32.75Gb/s flexible-reach wireline transceiver in 20nm CMOS., , , , , , , , , and 6 other author(s). ISSCC, page 1-3. IEEE, (2015)A wide common-mode fully-adaptive multi-standard 12.5Gb/s backplane transceiver in 28nm CMOS., , , , , , , , , and 6 other author(s). VLSIC, page 104-105. IEEE, (2012)A Low-Power 0.5-6.6 Gb/s Wireline Transceiver Embedded in Low-Cost 28 nm FPGAs., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 48 (11): 2582-2594 (2013)Wideband flexible-reach techniques for a 0.5-16.3Gb/s fully-adaptive transceiver in 20nm CMOS., , , , , , , , , and 3 other author(s). CICC, page 1-4. IEEE, (2014)Design of high-speed wireline transceivers for backplane communications in 28nm CMOS., , , , , , , , , and 1 other author(s). CICC, page 1-4. IEEE, (2012)A 0.5-16.3 Gb/s Fully Adaptive Flexible-Reach Transceiver for FPGA in 20 nm CMOS., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 50 (8): 1932-1944 (2015)A 1.24-pJ/b 112-Gb/s (870 Gb/s/Mm) Transceiver for In-Package Links in 7-nm FinFET., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 57 (4): 1199-1210 (2022)A 1.24pJ/b 112Gb/s (870Gbps/mm) Transceiver for In-package Links in 7nm FinFET., , , , , , , , , and 3 other author(s). VLSI Circuits, page 1-2. IEEE, (2021)