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Disambiguation of "Misra, Prasanna Kumar"

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A 60 GHz, 50 mW, 3dB Noise Figure Receiver Frontend Using UMC 40 nm CMOS technology.

, , , , and . iSES, page 227-231. IEEE, (2020)

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Hara Prasanna Misra

Prasanna Kumar Pathath

Manoj Misra

Sidhant Misra

Ashok Misra

 

Other publications of authors with the same name

A 60 GHz, 50 mW, 3dB Noise Figure Receiver Frontend Using UMC 40 nm CMOS technology., , , , and . iSES, page 227-231. IEEE, (2020)Design of Transceiver at 865-867 MHz Band using UMC 180 nm CMOS Technology., , , , , , , and . VDAT, page 1-5. IEEE, (2020)Design and Analysis of Low-Voltage, MOS-only Bandgap Reference Circuit., , , , and . iSES, page 283-286. IEEE, (2023)Design of Hexagonal Oscillator for True Random Number Generation., , , , and . ICECS 2022, page 1-4. IEEE, (2022)A 40nm Low Power High Stable SRAM Cell Using Separate Read Port and Sleep Transistor Methodology., , , and . iSES, page 1-5. IEEE, (2018)Modified Tent Map Based Design for True Random Number Generator., , , and . iSES, page 27-30. IEEE, (2018)Analysis of modulation schemes for Bluetooth-LE module for Internet-of-Things (IoT) applications., , and . ICCE, page 1-4. IEEE, (2018)0.4 mW, 0.27 pJ/bit true random number generator using jitter, metastability and current starved topology., , , , , and . IET Circuits Devices Syst., 14 (7): 1001-1011 (2020)A Proposed Technique to Improve the Performance of Receiver by Using Linear Gm-C Low-Pass Filter for mmwave Band Applications., , and . J. Circuits Syst. Comput., 30 (16): 2150304:1-2150304:16 (2021)Design of SRAM cell using Voltage Lowering and Stacking Techniques for Low Power Applications., , and . APCCAS, page 50-53. IEEE, (2020)