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Fault tolerant Field Programmable Neural Networks., , and . NORCAS, page 1-4. IEEE, (2015)Multidimensional Pareto Frontiers Intersection Determination and Processor Optimization Case Study., , , , , and . DSD, page 597-600. IEEE, (2019)Comparison of FPNNs models approximation capabilities and FPGA resources utilization., , and . ICCP, page 125-132. IEEE, (2017)HLS-based fault tolerance approach for SRAM-based FPGAs., , , and . FPT, page 301-302. IEEE, (2016)Mapping Trained Neural Networks to FPNNs., , and . DDECS, page 157-160. IEEE Computer Society, (2015)A Processor Optimization Framework for a Selected Application., , , , , and . EWDTS, page 1-11. IEEE, (2018)Testing Embedded Software Through Fault Injection: Case Study on Smart Lock., , , , , and . LATS, page 1-6. IEEE, (2021)Triple modular redundancy used in field programmable neural networks., , and . EWDTS, page 1-6. IEEE Computer Society, (2017)Data types and operations modifications: A practical approach to fault tolerance in HLS., , , and . EWDTS, page 1-6. IEEE Computer Society, (2017)Detecting hard synapses faults in artificial neural networks., , and . LATS, page 1-6. IEEE, (2019)