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On state reduction of incompletely specified finite state machines.

, and . Comput. Electr. Eng., 33 (1): 58-69 (2007)

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Partial bitstream protection for low-cost FPGAs with physical unclonable function, obfuscation, and dynamic partial self reconfiguration., , , , , and . Comput. Electr. Eng., 39 (2): 386-397 (2013)Optimization of Embedded Controllers Based on Redundant Transition Removal and Fault Simulation Using k-WISE Tests.. J. Circuits Syst. Comput., 18 (4): 647-663 (2009)Fast Multiplier Generator for FPGAs with LUT based Partial Product Generation and Column/row Compression., , , , and . Integr., (2017)Tools and Techniques for Implementation of Real-time Video Processing Algorithms., , , , , , , , and . J. Signal Process. Syst., 91 (1): 93-113 (2019)Generating fast logic circuits for m-select n-port Round Robin Arbitration., , and . VLSI-SoC, page 260-265. IEEE, (2013)Fast and Efficient Implementation of Lightweight Crypto Algorithm PRESENT on FPGA through Processor Instruction Set Extension., , , , , , , , and . EWDTS, page 1-5. IEEE, (2019)Defect-Tolerant Logic Mapping for Nanocrossbars Based on Two-Dimensional Sort., , and . ISCIS, volume 62 of Lecture Notes in Electrical Engineering, page 399-404. Springer, (2010)Real Time Wireless Packet Monitoring with Raspberry Pi Sniffer., , and . ISCIS, page 185-192. Springer, (2014)Ultra-fast curve fitting for pulses on FPGA., , , , and . SIU, page 1-4. IEEE, (2012)Reconfigurable hardware-based genome aligner using quality scores., , , and . SIU, page 1-4. IEEE, (2013)