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Crosstalk test generation on pseudo industrial circuits: a case study.

, , , and . ITC, page 548-557. IEEE Computer Society, (2001)

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A Note on Three-Valued Logic Simulation.. IEEE Trans. Computers, 21 (4): 399-402 (1972)Functional Partitioning and Simulation of Digital Circuits.. IEEE Trans. Computers, 19 (11): 1038-1046 (1970)Roving Emulation as a Fault Detection Mechanism., and . IEEE Trans. Computers, 35 (11): 933-939 (1986)Procedures for Eliminating Static and Dynamic Hazards in Test Generation., and . IEEE Trans. Computers, 23 (10): 1069-1078 (1974)On Area and Yield Considerations for Fault-Tolerant VLSI Processor Arrays., and . IEEE Trans. Computers, 33 (1): 21-27 (1984)Test Schedules for VLSI Circuits Having Built-In Test Hardware., and . IEEE Trans. Computers, 35 (4): 361-367 (1986)Scan Path with Look Ahead Shifting (SPLASH)., and . ITC, page 696-704. IEEE Computer Society, (1986)Generation of optimal code for expressions via factorization.. Commun. ACM, 12 (6): 333-340 (1969)Recent Developments in Design Automation.. Computer, 5 (3): 23-35 (1972)Efficient Overdetection Elimination of Acceptable Faults for Yield Improvement., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 31 (5): 754-764 (2012)