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Design and VLSI implementation of an access processor for a decoupled architecture.

, , , and . Microprocess. Microsystems, 16 (5): 237-247 (1992)

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Memory Latency Effects in Decoupled Architectures., , and . IEEE Trans. Computers, 43 (10): 1129-1139 (1994)Improving Cache Performance in a Multiprocessor Environment., and . PDPTA, page 413-422. CSREA Press, (1995)Performance Analysis of an Address Generation Coprocessor., , and . ICPP (1), page 136-143. CRC Press, (1991)A Reconfigurable Multiprocessor., and . ICPP, page 649-651. IEEE Computer Society Press, (1985)Real-Time Implementation of Obstacle Detection Algorithms on a Datacube MaxPCI Architecture., , , , , and . Real Time Imaging, 8 (2): 157-172 (2002)Architecture for a Non-deterministic Simulation Machine., and . WSC, page 1599-1606. WSC, (1998)Memory Latency Effects in Decoupled Architectures With a Single Data Memory Module., , and . ISCA, page 236-245. ACM, (1992)Evaluation of Computing in Memory Architectures for Digital Image Processing Applications., , , , and . ICCD, page 146-151. IEEE Computer Society, (1999)Computing in Memory Architectures for Digital Image Processing., , , , and . MTDT, page 8-15. IEEE Computer Society, (1999)Design and VLSI implementation of an access processor for a decoupled architecture., , , and . Microprocess. Microsystems, 16 (5): 237-247 (1992)