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Disambiguation of "Lee, Hae-Seung"

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A 14-b 30MS/s 0.75mm2 Pipelined ADC with On-Chip Digital Self-Calibration.

, , , , , and . CICC, page 313-316. IEEE, (2007)

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Hae-Hyuk Lee

Eun-Hae Lee

Hae-Yun Lee

Seung-Hyeob Lee

Woo Seung Lee

 

Other publications of authors with the same name

Session 26 overview: Nyquist-rate converters: Data converters subcommittee., and . ISSCC, page 456-457. IEEE, (2015)Redundancy in SAR ADCs., , and . ACM Great Lakes Symposium on VLSI, page 283-288. ACM, (2011)A Continuous-Time Sturdy-MASH ΔΣ Modulator in 28 nm CMOS., , and . IEEE J. Solid State Circuits, 50 (12): 2880-2890 (2015)16-channel oversampled analog-to-digital converter., , and . IEEE J. Solid State Circuits, 29 (9): 1077-1085 (September 1994)Power-efficient amplifier frequency compensation for continuous-time delta-sigma modulators., , and . MWSCAS, page 562-565. IEEE, (2013)Sniff-SAR: A 9.8fJ/c.-s 12b secure ADC with detectiondriven protection against power and EM side-channel attack., , and . CICC, page 1-2. IEEE, (2023)A 6.4-GS/s 1-GHz BW Continuous-Time Pipelined ADC with Time-Interleaved Sub-ADC-DAC Achieving 61.7-dB SNDR in 16-nm FinFET., , , , , , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)A 2.9-mW 11-b 20-MS/s pipelined ADC with dual-mode-based digital background calibration., , and . ESSCIRC, page 269-272. IEEE, (2012)A 450 MS/s 10-bit time-interleaved zero-crossing based ADC., and . CICC, page 1-4. IEEE, (2011)S2ADC: A 12-bit, 1.25-MS/s Secure SAR ADC With Power Side-Channel Attack Resistance., , and . IEEE J. Solid State Circuits, 56 (3): 844-854 (2021)