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Communication Costs Driven Design Space Exploration for Reconfigurable Architectures.

, , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 921-933. Springer, (2003)

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IBC-EI: An Instruction Based Compression method with Encryption and Integrity Checking., , , , , , and . ReCoSoC, page 138-145. Univ. Montpellier II, (2007)WHISPER: A Tool for Run-Time Detection of Side-Channel Attacks., , , , , , and . IEEE Access, (2020)Asymmetric Cache Coherency: Policy Modifications to Improve Multicore Performance., , and . ACM Trans. Reconfigurable Technol. Syst., 5 (3): 12:1-12:12 (2012)Protecting Behavioral IPs During Design Time: Key-Based Obfuscation Techniques for HLS in the Cloud., , , and . Behavioral Synthesis for Hardware Security, (2022)Closed-loop-based self-adaptive Hardware/Software-Embedded systems: Design methodology and smart cam case study., , and . ACM Trans. Embed. Comput. Syst., 10 (3): 38:1-38:28 (2011)Work in Progress: Thwarting Timing Attacks in Microcontrollers using Fine-grained Hardware Protections., , , , , , , and . EuroS&P Workshops, page 304-310. IEEE, (2023)Design and Implementation of a Multi-Core Crypto-Processor for Software Defined Radios., , , , and . ARC, volume 6578 of Lecture Notes in Computer Science, page 29-40. Springer, (2011)3DMIA: a multi-objective artificial immune algorithm for 3D-MPSoC multi-application 3D-NoC mapping., , , , , and . GECCO (Companion), page 167-168. ACM, (2013)Dynamic NoC-based architecture for MPSoC security implementation., , , , and . SBCCI, page 197-202. ACM, (2011)Run-time Detection of Prime + Probe Side-Channel Attack on AES Encryption Algorithm., , , , , and . GIIS, page 1-5. IEEE, (2018)