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Disambiguation of "Kong, Yuyao"

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Sandwich-RAM: An Energy-Efficient In-Memory BWN Architecture with Pulse-Width Modulation.

, , , , , , and . ISSCC, page 394-396. IEEE, (2019)

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Thay Kong

Xiangqing Kong

Seunghyun Kong

Deming Kong

Yuanbo Kong

 

Other publications of authors with the same name

TIMAQ: A Time-Domain Computing-in-Memory-Based Processor Using Predictable Decomposed Convolution for Arbitrary Quantized DNNs., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 56 (10): 3021-3038 (2021)SNNIM: A 10T-SRAM based Spiking-Neural-Network-In-Memory architecture with capacitance computation., , , , , , , , , and 4 other author(s). ISCAS, page 3383-3387. IEEE, (2022)Design Challenges and Methodology of High-Performance SRAM-Based Compute-in-Memory for AI Edge Devices., , , , , and . UCET, page 47-52. IEEE, (2021)A 28nm 64-kb 31.6-TFLOPS/W Digital-Domain Floating-Point-Computing-Unit and Double-Bit 6T-SRAM Computing-in-Memory Macro for Floating-Point CNNs., , , , , , , , , and 9 other author(s). ISSCC, page 128-129. IEEE, (2023)Evaluation Platform of Time-Domain Computing-in-Memory Circuits., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (3): 1174-1178 (March 2023)A 28nm Horizontal-Weight-Shift and Vertical-feature-Shift-Based Separate-WL 6T-SRAM Computation-in-Memory Unit-Macro for Edge Depthwise Neural-Networks., , , , , , , , , and 6 other author(s). ISSCC, page 134-135. IEEE, (2023)Design Methodology towards High-Precision SRAM based Computation-in-Memory for AI Edge Devices., , , , , , , , , and . ISOCC, page 195-196. IEEE, (2021)A Time-Domain Computing-in-Memory based Processor using Predictable Decomposed Convolution for Arbitrary Quantized DNNs., , , , , , , , , and 5 other author(s). A-SSCC, page 1-4. IEEE, (2020)In-memory Processing based on Time-domain Circuit., and . ACM Great Lakes Symposium on VLSI, page 435-438. ACM, (2019)Sandwich-RAM: An Energy-Efficient In-Memory BWN Architecture with Pulse-Width Modulation., , , , , , and . ISSCC, page 394-396. IEEE, (2019)