Author of the publication

A 14-bit 1-GS/s SiGe Bootstrap Sampler for High Resolution ADC with 250-MHz Input.

, , , , and . ISCAS, page 2047-2051. IEEE, (2022)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A 4.8 GS/s 5-bit ADC-Based Receiver With Embedded DFE for Signal Equalization., and . IEEE J. Solid State Circuits, 44 (3): 901-915 (2009)A 14-bit, 10-Msamples/s D/A converter using multibit ΣΔ modulation., , and . IEEE J. Solid State Circuits, 34 (5): 607-615 (1999)Introduction to the Special Issue on the 2005 IEEE International Solid-State Circuits Conference., , , and . IEEE J. Solid State Circuits, 41 (1): 3-6 (2006)A low-power adaptive bandwidth PLL and clock buffer with supply-noise compensation., and . IEEE J. Solid State Circuits, 38 (11): 1804-1812 (2003)An 85%-Efficiency Hybrid DC-DC Converter for Sub-Microwatt IoT Applications., and . MWSCAS, page 9-12. IEEE, (2019)Effects of Active Cooling on Workload Management in High Performance Processors., and . CLOSER, page 5-16. SciTePress, (2015)CMOS LC oscillator using variable mean frequency., , and . CICC, page 147-150. IEEE, (2003)A 4.6GHz MDLL with -46dBc reference spur and aperture position tuning., , , , and . ISSCC, page 466-468. IEEE, (2011)Device-circuit co-optimization for mixed-mode circuit design via geometric programming., , , and . ICCAD, page 470-475. IEEE Computer Society, (2007)Stability Estimation of a 6T-SRAM Cell Using a Nonlinear Regression., and . IEEE Trans. Very Large Scale Integr. Syst., 22 (1): 27-38 (2014)