( en | de | ru )

 

Disambiguation of "Flich, José"

Author of the publication

copydeleteadd this publication to your clipboard
Towards a Cost-Effective Interconnection Network Architecture with QoS and Congestion Management Support.

, , , , , , and . Euro-Par, volume 4128 of Lecture Notes in Computer Science, page 884-895. Springer, (2006)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Humberto Jorge José

Nadine José Gonzalez

José Navarrete

José Schneider

José Putharikal

 

Other publications of authors with the same name

Logic-Based Distributed Routing for NoCs., and . IEEE Comput. Archit. Lett., 7 (1): 13-16 (2008)Fault-Tolerant Vertical Link Design for Effective 3D Stacking., , , , and . IEEE Comput. Archit. Lett., 10 (2): 41-44 (2011)An Efficient Fault-Tolerant Routing Methodology for Meshes and Tori., , , , , , , and . IEEE Comput. Archit. Lett., (2004)Efficient implementation of distributed routing algorithms for NoCs., , , , and . IET Comput. Digit. Tech., 3 (5): 460-475 (2009)Area-efficient snoopy-aware NoC design for high-performance chip multiprocessor systems., , , and . Comput. Electr. Eng., (2015)An Effective and Feasible Congestion Management Technique for High-Performance MINs with Tag-Based Distributed Routing., , , , and . IEEE Trans. Parallel Distributed Syst., 24 (10): 1918-1929 (2013)A Routing Methodology for Achieving Fault Tolerance in Direct Networks., , , , , , , and . IEEE Trans. Computers, 55 (4): 400-415 (2006)An Efficient and Deadlock-Free Network Reconfiguration Protocol., , , , , and . IEEE Trans. Computers, 57 (6): 762-779 (2008)Switch Architecture.. Encyclopedia of Parallel Computing, Springer, (2011)Towards Efficient Neural Network Model Parallelism on Multi-FPGA Platforms., , and . DATE, page 1-6. IEEE, (2023)