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Disambiguation of "Rajaei, Ramin"

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Eva-CAM: A Circuit/Architecture-Level Evaluation Tool for General Content Addressable Memories.

, , , , , , , and . DATE, page 1173-1176. IEEE, (2022)

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Ulrich Ramin

Rotraud Ramin

Kurt Ramin

Elsbeth Raming

Ludwig Ramin

 

Other publications of authors with the same name

A Reliable, Low Power and Nonvolatile MTJ-Based Flip-Flop for Advanced Nanoelectronics.. Journal of Circuits, Systems, and Computers, 27 (13): 1850205:1-1850205:14 (2018)Highly reliable and low-power magnetic full-adder designs for nanoscale technologies.. Microelectron. Reliab., (2017)Single event upset immune latch circuit design using C-element., , and . ASICON, page 252-255. IEEE, (2011)Single Event Multiple Upset (SEMU) Tolerant Latch Designs in Presence of Process and Temperature Variations., , and . Journal of Circuits, Systems, and Computers, 24 (1): 1550007:1-1550007:30 (2015)A process variation resilient spintronic true random number generator for highly reliable hardware security applications., , and . Microelectron. J., (2022)A Hybrid FeMFET-CMOS Analog Synapse Circuit for Neural Network Training and Inference., , , , , and . ISCAS, page 1-5. IEEE, (2020)In-Memory Nearest Neighbor Search with FeFET Multi-Bit Content-Addressable Memories., , , , , , , , and . DATE, page 1084-1089. IEEE, (2021)Single event double node upset tolerance in MOS/spintronic sequential and combinational logic circuits.. Microelectron. Reliab., (2017)A soft error tolerant register file for highly reliable microprocessor design., , and . Int. J. High Perform. Syst. Archit., 7 (3): 113-119 (2017)Addressing Benign and Malicious Crosstalk in Modern System-on-Chips., , , , and . IEEE Access, (2023)