( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
FastYield: variation-aware, layout-driven simultaneous binding and module selection for performance yield optimization.

, , и . ASP-DAC, стр. 61-66. IEEE, (2009)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Liu Deming

Deming Sun

Deming Kong

Deming Kong

Chen Chen

 

Другие публикации лиц с тем же именем

Performance-driven mapping for CPLD architectures., , , и . FPGA, стр. 39-47. ACM, (2001)Algorithm/Accelerator Co-Design and Co-Search for Edge AI., , , и . IEEE Trans. Circuits Syst. II Express Briefs, 69 (7): 3064-3070 (2022)VecQ: Minimal Loss DNN Model Compression With Vectorized Weight Quantization., , , , , и . IEEE Trans. Computers, 70 (5): 696-710 (2021)ASAP: Accelerated Short-Read Alignment on Programmable Hardware., , , , , , и . IEEE Trans. Computers, 68 (3): 331-346 (2019)Exploring HW/SW Co-Design for Video Analysis on CPU-FPGA Heterogeneous Systems., , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (6): 1606-1619 (2022)An Efficient Compiler Framework for Cache Bypassing on GPUs., , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (10): 1677-1690 (2015)A Routing Approach to Reduce Glitches in Low Power FPGAs., , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (2): 235-240 (2010)A Hardware-Efficient Block Matching Algorithm and Its Hardware Design for Variable Block Size Motion Estimation in Ultra-High-Definition Video Encoding., , , , и . ACM Trans. Design Autom. Electr. Syst., 24 (2): 15:1-15:21 (2019)ASAP: Accelerated Short-Read Alignment on Programmable Hardware., , , , , , и . CoRR, (2018)ScaleHLS: Scalable High-Level Synthesis through MLIR., , , , , , и . CoRR, (2021)