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Disambiguation of "Rajendran, Sree Ranjani"

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A comprehensive survey of physical and logic testing techniques for Hardware Trojan detection and prevention.

, , and . J. Cryptogr. Eng., 12 (4): 495-522 (2022)

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Chitra Rajendran

Ranjani Dhakshinamoorthy

Vidyalakshmi Rajendran

Balamurali Sreedhar

Rajeswara Sarma Sreeramula

 

Other publications of authors with the same name

A comprehensive survey of physical and logic testing techniques for Hardware Trojan detection and prevention., , and . J. Cryptogr. Eng., 12 (4): 495-522 (2022)KARNA for a Trustable Hardware.. VDAT, page 1-4. IEEE, (2020)A Novel Logical Locking Technique Against Key-Guessing Attacks., and . ISED, page 178-182. IEEE, (2018)Benchmarking of SoC-Level Hardware Vulnerabilities: A Complete Walkthrough., , , and . ISVLSI, page 1-6. IEEE, (2023)HUnTer: Hardware Underneath Trigger for Exploiting SoC-level Vulnerabilities., , , , , and . DATE, page 1-6. IEEE, (2023)Adiabatic Physical Unclonable Function Using Cross-Coupled Pair., , , and . iSES, page 278-282. IEEE, (2022)Enhanced Logical Locking for a Secured Hardware IP Against Key-Guessing Attacks., and . VDAT, volume 892 of Communications in Computer and Information Science, page 186-197. Springer, (2018)Exploring the Abyss? Unveiling Systems-on-Chip Hardware Vulnerabilities Beneath Software., , , , , and . IEEE Trans. Inf. Forensics Secur., (2024)A Flexible Online Checking Technique to Enhance Hardware Trojan Horse Detectability by Reliability Analysis., , , , and . IEEE Trans. Emerg. Top. Comput., 5 (2): 260-270 (2017)SoK: Physical and Logic Testing Techniques for Hardware Trojan Detection., , and . ASHES@CCS, page 103-116. ACM, (2020)