( en | de | ru )

 

Disambiguation of "Mueller-Thuns, Robert B."

Author of the publication

copydeleteadd this publication to your clipboard
Hierarchical multi-level fault simulation of large systems.

, , , , and . J. Electron. Test., 1 (2): 139-149 (1990)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Gerd Mueller-Thuns

Joerg Mueller-Thuns

Waldemar Mueller-Thuns

Thomas Mueller-Thuns

Erwin B Mueller

 

Other publications of authors with the same name

SNEL: A Switch-Level Simulator Using Multiple Levels of Functional Abstraction., , , , and . ICCAD, page 66-69. IEEE Computer Society, (1990)Design of a scalable parallel switch-level simulator for VLSI., , and . SC, page 615-624. IEEE Computer Society, (1990)CHAMP: concurrent hierarchical and multilevel program for simulation of VLSI circuits., , , , and . ICCAD, page 246-249. IEEE Computer Society, (1988)Algorithm-Based Fault Tolerance for Adaptive Least Squares Lattice Filtering on a Hypercube Multiprocessor., , and . ICPP (3), page 177-180. Pennsylvania State University Press, (1989)0-271-00686-2.Hierarchical multi-level fault simulation of large systems., , , , and . J. Electron. Test., 1 (2): 139-149 (1990)Parallel switch-level simulation for VLSI., , and . EURO-DAC, page 324-328. EEE Computer Society, (1991)Improving Language Containment Using Fairness Graphs., , and . CAV, volume 818 of Lecture Notes in Computer Science, page 391-403. Springer, (1994)Automatic Generation of Behavioral Models from Switch-Level Descriptions., , , , and . DAC, page 179-184. ACM Press, (1989)Parallel processing for VLSI simulation. University of Illinois Urbana-Champaign, USA, (1990)Portable parallel logic and fault simulation., , , and . ICCAD, page 506-509. IEEE Computer Society, (1989)