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Two-sided projection method in variational equation model order reduction of nonlinear circuits.

, , , , and . ISCAS (4), page 816-819. IEEE, (2004)

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FPART: A Multi-way FPGA Partitioning Procedure Based on the Improved FM Algorithm., , and . ASP-DAC, page 513-518. IEEE, (1998)High-speed and memory-efficient architecture for 2-D 1-Level discrete wavelet transform., , , , and . ICECS, page 486-489. IEEE, (2008)A high-performance reconfigurable VLSI architecture for vbsme in H.264., , , , and . IEEE Trans. Consumer Electronics, 54 (3): 1338-1345 (2008)A novel dynamic reconfigurable VLSI architecture for H.264 transforms., , , , and . APCCAS, page 1810-1813. IEEE, (2008)A New Universal Test Pattern Auto-generating Approach for FPGA Logic Resources (abstract only)., and . FPGA, page 263. ACM, (2005)A Reconfigurable Multi-Transform VLSI Architecture Supporting Video Codec Design., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (7): 432-436 (2011)Engineering a scalable Boolean matching based on EDA SaaS 2.0., , , , and . ICCAD, page 750-755. IEEE, (2010)A SC-based novel configurable analog cell., and . FPGA, page 243. ACM, (2003)Domain Specific Non-Uniform Routing Architecture for Embedded Programmable IP Core (abstract only)., , and . FPGA, page 269. ACM, (2005)An Analytical Delay Model for SRAM-Based FPGA Interconnections., , , and . ASP-DAC, page 101-104. IEEE Computer Society, (1999)