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A fully pipelined single-precision floating-point unit in the synergistic processor element of a CELL processor.

H. Oh, S. Müller, C. Jacobi, K. Tran, S. Cottier, B. Michael, H. Nishikawa, Y. Totsuka, T. Namatame, N. Yano, T. Machida, and S. Dhong. IEEE J. Solid State Circuits, 41 (4): 759-771 (2006)

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Michitami Yano

Naoka Iki

Thaise Yano

Hisashi Yano

Maxim Yanovskiy

Other publications of authors with the same name

The microarchitecture of the synergistic processor for a cell processor.B. Flachs, S. Asano, S. Dhong, H. Hofstee, G. Gervais, R. Kim, T. Le, P. Liu, J. Leenstra, J. Liberty and 11 other author(s). IEEE J. Solid State Circuits, 41 (1): 63-70 (2006)Microarchitecture and implementation of the synergistic processor in 65-nm and 90-nm SOI.B. Flachs, S. Asano, S. Dhong, H. Hofstee, G. Gervais, R. Kim, T. Le, P. Liu, J. Leenstra, J. Liberty and 19 other author(s). IBM J. Res. Dev., 51 (5): 529-544 (2007)A fully pipelined single-precision floating-point unit in the synergistic processor element of a CELL processor.H. Oh, S. Müller, C. Jacobi, K. Tran, S. Cottier, B. Michael, H. Nishikawa, Y. Totsuka, T. Namatame, N. Yano and 2 other author(s). IEEE J. Solid State Circuits, 41 (4): 759-771 (2006)A multiplier-accumulator macro for a 45 MIPS embedded RISC processor.H. Murakami, N. Yano, Y. Ootaguro, Y. Sugeno, M. Ueno, Y. Muroya, and T. Aramaki. IEEE J. Solid State Circuits, 31 (7): 1067-1071 (1996)

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Disambiguation of "Yano, Naoka"

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A fully pipelined single-precision floating-point unit in the synergistic processor element of a CELL processor.

Please choose a person to relate this publication to

Michitami Yano

Naoka Iki

Thaise Yano

Hisashi Yano

Maxim Yanovskiy

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Yano, Naoka"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A fully pipelined single-precision floating-point unit in the synergistic processor element of a CELL processor.

Please choose a person to relate this publication to

Michitami Yano

Naoka Iki

Thaise Yano

Hisashi Yano

Maxim Yanovskiy

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A fully pipelined single-precision floating-point unit in the synergistic processor element of a CELL processor.