( en | de | ru )

 

Disambiguation of "Qin, Eric"

Author of the publication

copydeleteadd this publication to your clipboard
Understanding the Design-Space of Sparse/Dense Multiphase GNN dataflows on Spatial Accelerators.

, , , , , , , , , , and . IPDPS, page 571-582. IEEE, (2022)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Qi Qin

Qin Wang

Gang Qin

Minghao Qin

Qin Li

 

Other publications of authors with the same name

RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU., , , , , , and . DAC, page 253-258. IEEE, (2021)Self adaptive reconfigurable arrays (SARA): learning flexible GEMM accelerator configuration and mapping-space using ML., , , and . DAC, page 583-588. ACM, (2022)Extending Sparse Tensor Accelerators to Support Multiple Compression Formats., , , , , , , , , and . IPDPS, page 1014-1024. IEEE, (2021)Building Efficient Tensor Accelerators for Sparse and Irregular Workloads.. Georgia Institute of Technology, Atlanta, GA, USA, (2022)base-search.net (ftgeorgiatech:oai:smartech.gatech.edu:1853/66540).Understanding the Design-Space of Sparse/Dense Multiphase GNN dataflows on Spatial Accelerators., , , , , , , , , and 1 other author(s). IPDPS, page 571-582. IEEE, (2022)SIGMA: A Sparse and Irregular GEMM Accelerator with Flexible Interconnects for DNN Training., , , , , , , and . HPCA, page 58-70. IEEE, (2020)Architecture, Chip, and Package Co-design Flow for 2.5D IC Design Enabling Heterogeneous IP Reuse., , , , , , , , , and 5 other author(s). DAC, page 178. ACM, (2019)VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs., , , , , , , and . HPCA, page 259-272. IEEE, (2023)Context-aware control of smart objects via human-machine communication., , , and . BioCAS, page 1-4. IEEE, (2015)