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Rapid Arithmetic Level Simulation Based Energy Estimation for Hardware/Software Co-Design Using FPGAs.

, and . ERSA, page 55-61. CSREA Press, (2005)

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Rapid Arithmetic Level Simulation Based Energy Estimation for Hardware/Software Co-Design Using FPGAs., and . ERSA, page 55-61. CSREA Press, (2005)A Cooperative Management Scheme for Power Efficient Implementations of Real-Time Operating Systems on Soft Processors., and . IEEE Trans. Very Large Scale Integr. Syst., 16 (1): 45-56 (2008)Design space exploration using arithmetic-level hardware--software cosimulation for configurable multiprocessor platforms., and . ACM Trans. Embed. Comput. Syst., 5 (2): 355-382 (2006)Energy-efficient hardware/software co-synthesis for a class of applications on reconfigurable SoCs., , and . Int. J. Embed. Syst., 1 (1/2): 91-102 (2005)Performance Modeling of Reconfigurable SoC Architectures and Energy-Efficient Mapping of a Class of Applications., , and . FCCM, page 241-250. IEEE Computer Society, (2003)MATLAB/Simulink Based Hardware/Software Co-Simulation for Designing Using FPGA Configured Soft Processors., and . IPDPS, IEEE Computer Society, (2005)Rapid energy estimation of computations on FPGA based soft processors., and . SoCC, page 285-288. IEEE, (2004)Time and energy efficient Viterbi decoding using FPGAs., and . ICASSP (5), page 33-36. IEEE, (2005)PyGen: A MATLAB/Simulink Based Tool for Synthesizing Parameterized and Energy Efficient Designs Using FPGAs., and . FCCM, page 47-56. IEEE Computer Society, (2004)An Estimation and Simulation Framework for Energy Efficient Design using Platform FPGAs., , and . FCCM, page 290-291. IEEE Computer Society, (2003)