Author of the publication

Energy Aware Synthesis of Application Kernels Expressed in Functional Languages on a Coarse Grained Composable Reconfigurable Array.

, , , , and . iNIS, page 7-12. IEEE, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Energy Aware Synthesis of Application Kernels Expressed in Functional Languages on a Coarse Grained Composable Reconfigurable Array., , , , and . iNIS, page 7-12. IEEE, (2015)Transport Triggered near Memory Accelerator for Deep Learning., , , , , and . ISCAS, page 1-5. IEEE, (2021)REDEFINE®™: a case for WCET-friendly hardware accelerators for real time applications (work-in-progress)., , , , , and . CASES, page 15:1-15:2. ACM, (2017)A framework for post-silicon realization of arbitrary instruction extensions on reconfigurable data-paths., , , , , , , , , and . J. Syst. Archit., 60 (7): 592-614 (2014)Flexible resource allocation and management for application graphs on ReNÉ MPSoC., , , , , and . PARMA-DITAM@HiPEAC, page 13-18. ACM, (2016)RHyMe: REDEFINE Hyper Cell Multicore for Accelerating HPC Kernels., , , , and . VLSID, page 601-602. IEEE Computer Society, (2016)Compiling HPC Kernels for the REDEFINE CGRA., , , , and . HPCC/CSS/ICESS, page 405-410. IEEE, (2015)Energy aware synthesis of application kernels through composition of data-paths on a CGRA., , , , and . Integr., (2017)Autotuning LSTM for Accelerated Execution on Edge., , , , , , and . ISCAS, page 1-5. IEEE, (2021)Synthesis of Instruction Extensions on HyperCell, a reconfigurable datapath., , , , , and . ICSAMOS, page 215-224. IEEE, (2014)