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A comprehensive compact model for the design of all-spin-logic based circuits., , , and . Microelectron. J., (2019)Guest Editorial: Emerging Technologies and Architectures for Manycore Computing Part 1: Hardware Techniques., , and . IEEE Trans. Multi Scale Comput. Syst., 4 (2): 97-98 (2018)Modeling and simulation of networked low-power embedded systems: a taxonomy., , , , and . EURASIP J. Wireless Comm. and Networking, (2014)On-Chip Optical Interconnect for Low-Power., and . Ultra Low-Power Electronics and Design, Kluwer / Springer, (2004)CNTFET Modeling and Reconfigurable Logic-Circuit Design., , , , , , , , , and 2 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 54-I (11): 2365-2379 (2007)Holding Conferences Online in Pandemic Times: The DATE Experience., and . IEEE Des. Test, 38 (4): 128-130 (2021)Exploiting Approximate Computing for Efficient and Reliable Convolutional Neural Networks., , and . ISVLSI, page 326. IEEE, (2022)Dependability of Alternative Computing Paradigms for Machine Learning: hype or hope?, , , , , , , and . DDECS, page 7-13. IEEE, (2022)Cross Layer Design for the Predictive Assessment of Technology-Enabled Architectures., , , , , , , , , and . DATE, page 1-10. IEEE, (2023)A Heuristic Exploration of Retraining-free Weight-Sharing for CNN Compression., , , and . ASP-DAC, page 134-139. IEEE, (2022)