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NNTesting: Neural Network Fault Attacks Detection Using Gradient-Based Test Vector Generation.

A. Wang, B. Zhao, W. Tan, and Y. Lao. DAC, page 1-6. IEEE, (2023)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Wang Wang

Linfang Wang

Investigation of the functions of 53BP1 in DNA demethylationL. Wang. Uni Marburg, (2009)

Hanchun Wang

Fang Wang

Zhirong Wang

Other publications of authors with the same name

A Task-Oriented Dialogue Architecture via Transformer Neural Language Models and Symbolic Injection.O. Romero, A. Wang, J. Zimmerman, A. Steinfeld, and A. Tomasic. SIGDIAL, page 438-444. Association for Computational Linguistics, (2021)NoPUF: A Novel PUF Design Framework Toward Modeling Attack Resistant PUFs.A. Wang, W. Tan, Y. Wen, and Y. Lao. IEEE Trans. Circuits Syst. I Regul. Pap., 68 (6): 2508-2521 (2021)High-Speed VLSI Architectures for Modular Polynomial Multiplication via Fast Filtering and Applications to Lattice-Based Cryptography.W. Tan, A. Wang, X. Zhang, Y. Lao, and K. Parhi. IEEE Trans. Computers, 72 (9): 2454-2466 (September 2023)Homomorphic Evaluation Friendly Vision Transformer Design.A. Wang, and Y. Lao. ACSSC, page 7-10. IEEE, (2023)Low-Latency VLSI Architectures for Modular Polynomial Multiplication via Fast Filtering and Applications to Lattice-Based Cryptography.W. Tan, A. Wang, Y. Lao, X. Zhang, and K. Parhi. CoRR, (2021)PaReNTT: Low-Latency Parallel Residue Number System and NTT-Based Long Polynomial Modular Multiplication for Homomorphic Encryption.W. Tan, S. Chiu, A. Wang, Y. Lao, and K. Parhi. IEEE Trans. Inf. Forensics Secur., (2024)Integral Sampler and Polynomial Multiplication Architecture for Lattice-based Cryptography.A. Wang, W. Tan, K. Parhi, and Y. Lao. DFT, page 1-6. IEEE, (2022)Area-Efficient Pipelined VLSI Architecture for Polar Decoder.W. Tan, A. Wang, Y. Xu, and Y. Lao. ISVLSI, page 352-357. IEEE, (2020)High-Speed Modular Multiplier for Lattice-Based Cryptosystems.W. Tan, B. Case, A. Wang, S. Gao, and Y. Lao. IEEE Trans. Circuits Syst. II Express Briefs, 68 (8): 2927-2931 (2021)PaReNTT: Low-Latency Parallel Residue Number System and NTT-Based Long Polynomial Modular Multiplication for Homomorphic Encryption.W. Tan, S. Chiu, A. Wang, Y. Lao, and K. Parhi. CoRR, (2023)

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Disambiguation of "Wang, Antian"

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NNTesting: Neural Network Fault Attacks Detection Using Gradient-Based Test Vector Generation.

Please choose a person to relate this publication to

Wang Wang

Linfang Wang

Hanchun Wang

Fang Wang

Zhirong Wang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Wang, Antian"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML NNTesting: Neural Network Fault Attacks Detection Using Gradient-Based Test Vector Generation.

Please choose a person to relate this publication to

Wang Wang

Linfang Wang

Hanchun Wang

Fang Wang

Zhirong Wang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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NNTesting: Neural Network Fault Attacks Detection Using Gradient-Based Test Vector Generation.