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On the Implication of NTC versus Dark Silicon on Emerging Scale-Out Workloads: The Multi-Core Architecture Perspective., , , , , and . IEEE Trans. Parallel Distributed Syst., 28 (8): 2314-2327 (2017)Live Demonstration: A self-powered ultraviolet radiation monitoring platform based on nonvolatile processor., , , , and . ISCAS, page 1-. IEEE, (2018)Low power driven loop tiling for RRAM crossbar-based CNN., , , , and . SAC, page 375-380. ACM, (2018)A Novel Time Synchronization Method for Dynamic Reconfigurable Bus., , , , and . VLSI Design, (2016)A Comparative Study on Racetrack Memories: Domain Wall vs. Skyrmion., , , , , , , and . NVMSA, page 7-12. IEEE, (2018)Expected Completion Time Aware Message Scheduling for UM-BUS Interconnected System., , , , , and . ISORC, page 60-66. IEEE Computer Society, (2017)Leveraging Energy Cycle Regularity to Predict Adaptive Mode for Non-volatile Processors., , , and . ASAP, page 189-196. IEEE, (2019)Write Mode Aware Loop Tiling for High Performance Low Power Volatile PCM., , and . DAC, page 106:1-106:6. ACM, (2014)Redesigning software and systems for non-volatile processors on self-powered devices., , , , and . VLSI-SoC, page 1-6. IEEE, (2016)Migration-Aware Loop Retiming for STT-RAM-Based Hybrid Cache in Embedded Systems., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (3): 329-342 (2014)