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Analysis of large ATM switches using a platform-independent simulation environment.

, and . J. Syst. Archit., 44 (6-7): 411-431 (1998)

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The Implementation of a Field Programmable Logic Based Co-Processor for the Acceleration of Discrete Event Simulators., , and . FPL, volume 1142 of Lecture Notes in Computer Science, page 415-424. Springer, (1996)Analysis of large ATM switches using a platform-independent simulation environment., and . J. Syst. Archit., 44 (6-7): 411-431 (1998)Scalable Run Time Reconfigurable Architecture., , and . VLSI, volume 162 of IFIP Conference Proceedings, page 113-124. Kluwer, (1999)Development of PVM Code for a Low Latency Switch Based Interconnect., , and . PVM, volume 1156 of Lecture Notes in Computer Science, page 229-234. Springer, (1996)Scheduling and admission control policies: A case study for ATM., , , and . Computer Networks and ISBN Systems, 29 (5): 539-554 (1997)Reconfigurable Programming in the Large on Extendable Uniform Reconfigurable Computing Array's: An Integrated Approach Based on Reconfigurable Virtual Architectures., , and . FPL, volume 1673 of Lecture Notes in Computer Science, page 469-474. Springer, (1999)Simulation of ATM Switches Using Dynamically Reconfigurable FPGAs., , and . FPL, volume 1482 of Lecture Notes in Computer Science, page 461-465. Springer, (1998)