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Disambiguation of "Nagaraj, N. S."

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Chip hierarchical design system (CHDS): a foundation for timing-driven physical design into the 21st century.

, , , , , , , and . ISPD, page 212-217. ACM, (1997)

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Other publications of authors with the same name

Taming Noise in Deep Submicron Digital Integrated Circuits (Panel)., , and . DAC, page 100-101. ACM Press, (1998)A New Optimizer for Performance Optimization of Analog Integrated Circuits.. DAC, page 148-153. ACM Press, (1993)Optimizing Interconnect for Performance in Standard Cell Library., , , and . APCCAS, page 1280-1284. IEEE, (2006)Interconnect Modeling for Timing, Signal Integrity and Reliability., and . ISQED, page 13. IEEE Computer Society, (2001)Enabling DIR(Designing-In-Reliability) through CAD Capabilities., , , , , , , and . ISQED, page 151-156. IEEE Computer Society, (2000)Approximate Computation of Signal Characteristics of On-chip RC Interconnect Trees., , and . ISCAS, page 109-112. IEEE, (1994)Chip hierarchical design system (CHDS): a foundation for timing-driven physical design into the 21st century., , , , , , , and . ISPD, page 212-217. ACM, (1997)DFM in practice: hit or hype?, , , , , , , and . DAC, page 898-899. ACM, (2008)BEOL variability and impact on RC extraction., , , , , , and . DAC, page 758-759. ACM, (2005)A Practical Approach to Crosstalk Noise Verification of Static CMOS Designs., , , , and . VLSI Design, page 370-375. IEEE Computer Society, (2000)