( en | de | ru )

 

Disambiguation of "Seto, Kenshu"

Author of the publication

copydeleteadd this publication to your clipboard
Field Modifiable Architecture with FPGAs and its Design/Verification/Debugging Methodologies.

, , , , , and . HICSS, page 279. IEEE Computer Society, (2003)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Jong Seto

Mohamed Kamal Morsi Setouhi

Setotaw Ferede Tesema

 

Other publications of authors with the same name

Field Modifiable Architecture and its Design Methodology: System Design Without Logic Synthesis., , , , and . IWLS, page 103-108. (2002)Scalar replacement in the presence of multiple write accesses for high-level synthesis.. DATE, page 26-31. IEEE, (2021)Custom Instruction Generation with High-Level Synthesis., and . SASP, page 14-19. IEEE Computer Society, (2008)Dynamically reconfigurable protocol transducer., , , , and . FPT, page 341-344. IEEE, (2006)Small Memory Footprint Neural Network Accelerators., , , , and . ISQED, page 253-258. IEEE, (2019)Pipeline Scheduling for Array Based Reconfigurable Architectures Considering Interconnect Delays., , , and . FPT, page 137-144. IEEE, (2005)Engineering Changes in Field Modifiable Architectures., , , , and . MEMOCODE, page 87-94. IEEE Computer Society, (2003)Custom Instruction Generation for Configurable Processors with Limited Numbers of Operands., and . Inf. Media Technol., 5 (2): 376-387 (2010)Interconnect-aware Pipeline Synthesis for Array based Reconfigurable Architectures., , , and . IESS, volume 231 of IFIP Advances in Information and Communication Technology, page 121-134. Springer, (2007)SAT-based resource binding for reducing critical path delays., , , and . FPL, page 507-510. IEEE, (2008)