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Knowledge Representation, Reasoning and Declarative Problem Solving by C. Baral, Cambridge University Press, 2003.. J. Funct. Program., 14 (5): 588-589 (2004)Runtime Programmable and Memory Bandwidth Optimized FPGA-Based Coprocessor for Deep Convolutional Neural Network., , and . IEEE Trans. Neural Networks Learn. Syst., 29 (12): 5922-5934 (2018)GRAPHOPT: constrained optimization-based parallelization of irregular graphs., , and . CoRR, (2021)Acceleration of probabilistic reasoning through custom processor architecture., , , and . CoRR, (2021)DPU: DAG Processing Unit for Irregular Graphs with Precision-Scalable Posit Arithmetic in 28nm., , , , and . CoRR, (2021)DPU-v2: Energy-efficient execution of irregular directed acyclic graphs., , and . MICRO, page 1288-1307. IEEE, (2022)On Hardware-Aware Probabilistic Frameworks for Resource Constrained Embedded Applications., , , , and . EMC2@NeurIPS, page 66-70. IEEE, (2019)9.4 PIU: A 248GOPS/W Stream-Based Processor for Irregular Probabilistic Inference Networks Using Precision-Scalable Posit Arithmetic in 28nm., , , , and . ISSCC, page 150-152. IEEE, (2021)ProbLP: A framework for low-precision probabilistic inference., , , and . DAC, page 190. ACM, (2019)Limits of translates of divergent geodesics and Integral points on one-sheeted hyperboloids, and . (2011)cite arxiv:1104.4988 Comment: 15 pages.