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Disambiguation of "Asadi, Hossein"

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Estimating and Mitigating Aging Effects in Routing Network of FPGAs.

, , , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (3): 651-664 (2019)

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Mehdi Asadi

Behrang Asadi

Awat Asadi

Hamed Asadi

Nima Asadi

 

Other publications of authors with the same name

Obtaining FPGA soft error rate in high performance information systems., , , and . Microelectron. Reliab., 49 (5): 551-557 (2009)A Resistive RAM-Based FPGA Architecture Equipped With Efficient Programming Circuitry., and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (7): 2196-2209 (2018)A System-Level Framework for Analytical and Empirical Reliability Exploration of STT-MRAM Caches., , and . IEEE Trans. Reliab., 69 (2): 594-610 (2020)Soft Error Modeling and Protection for Sequential Elements., and . DFT, page 463-474. IEEE Computer Society, (2005)A Fast Analytical Approach to Multi-cycle Soft Error Rate Estimation of Sequential Circuits., , , and . DSD, page 797-800. IEEE Computer Society, (2010)Dependability Analysis of Data Storage Systems in Presence of Soft Errors., , and . IEEE Trans. Reliab., 68 (1): 201-215 (2019)FPGA-Based Protection Scheme against Hardware Trojan Horse Insertion Using Dummy Logic., , , and . IEEE Embed. Syst. Lett., 7 (2): 46-50 (2015)Operating system level data tiering using online workload characterization., , and . J. Supercomput., 71 (4): 1534-1562 (2015)Analytical Techniques for Soft Error Rate Modeling and Mitigation of FPGA-Based Designs., and . IEEE Trans. Very Large Scale Integr. Syst., 15 (12): 1320-1331 (2007)A Modeling Framework for Reliability of Erasure Codes in SSD Arrays., , and . IEEE Trans. Computers, 69 (5): 649-665 (2020)