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A Novel Multi-Speed, Power Saving Architecture for SiGe HBT FPGA.

, , , , , , , and . Engineering of Reconfigurable Systems and Algorithms, page 181-187. CSREA Press, (2003)

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Accurate high-speed performance prediction for full differential current-mode logic: the effect of dielectric anisotropy., , , , , , , , , and 4 other author(s). IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 18 (2): 212-219 (1999)Minimax optimization of two-dimensional focused nonuniformly spaced arrays., , and . ICASSP, page 286-289. IEEE, (1979)A High Speed Reconfigurable Gate Array for Gigahertz Applications., , , , , and . ISVLSI, page 124-129. IEEE Computer Society, (2005)12-23 GHz Ultra Wide Tuning Range Voltage-Controlled Ring Oscillator with Hybrid Control Schemes., , and . ISVLSI, page 278-279. IEEE Computer Society, (2005)A 11 GHz FPGA with Test Applications., , , , , and . FPL, page 101-105. IEEE, (2005)A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology., , , , , and . FPGA, page 145-153. ACM, (2003)3D direct vertical interconnect microprocessors test vehicle., , , , , and . ACM Great Lakes Symposium on VLSI, page 141-146. ACM, (2003)Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory., , , , , , , , , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 11-20. Springer, (2003)SiGe HBT Microprocessor Core Test Vehicle., , , and . Proc. IEEE, 93 (9): 1669-1678 (2005)Design of High-Speed Register Files Using SiGe HBT BiCMOS Technology., , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 61-II (3): 178-182 (2014)