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Disambiguation of "Bajwa, Raminder Singh"

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Validation of an Architectural Level Power Analysis Technique.

, , , and . DAC, page 242-245. ACM Press, (1998)

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Raminder Singh

Raminder Singh

Vikramaditya Singh

Sohan Singh

Arunoday Singh

 

Other publications of authors with the same name

Architecture-level power estimation and design experiments., , and . ACM Trans. Design Autom. Electr. Syst., 6 (1): 50-66 (2001)A unified approach in the analysis of latches and flip-flops for low-power systems., , and . ISLPED, page 227-232. ACM, (1998)Comparative analysis of latches and flip-flops for high-performance systems., , and . ICCD, page 264-269. IEEE Computer Society, (1998)Area Time Trade-Offs in Micro-Grain VLSI Array Architectures., , and . IEEE Trans. Computers, 43 (10): 1121-1128 (1994)Rapid prototyping with programmable control paths., , , and . ASAP, page 69-74. IEEE, (1994)The MGAP's programming environment and the *C++ language., , and . ASAP, page 121-124. IEEE Computer Society, (1995)Simultaneous speech segmentation and phoneme recognition using dynamic programming., , and . ICASSP, page 3213-3216. IEEE Computer Society, (1996)Stage-skip pipeline: a low power processor architecture using a decoded instruction buffer., , , , , , , and . ISLPED, page 353-358. IEEE, (1996)Validation of an Architectural Level Power Analysis Technique., , , and . DAC, page 242-245. ACM Press, (1998)The design and implementation of the Arithmetic Cube II, a VLSI signal processing system., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 1 (4): 491-502 (1993)