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Extending LLVM for Lightweight SPMD Vectorization: Using SIMD and Vector Instructions Easily from Any Language., , , and . CGO, page 278-279. IEEE, (2019)Extending High-Level Synthesis with High-Performance Computing Performance Visualization., , , , and . CLUSTER, page 371-380. IEEE, (2020)High-Throughput Multi-Threaded Sum-Product Network Inference in the Reconfigurable Cloud., , , , and . H2RC@SC, page 26-33. IEEE, (2019)Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-Based Accelerators., , , , , and . ICCD, page 350-357. IEEE Computer Society, (2018)Using Parallel Programming Models for Automotive Workloads on Heterogeneous Systems - a Case Study., , , and . PDP, page 17-21. IEEE, (2020)Improving Job Launch Rates in the TaPaSCo FPGA Middleware by Hardware/Software-Co-Design., , , and . ROSS@SC, page 22-30. IEEE, (2020)Exact and Practical Modulo Scheduling for High-Level Synthesis., , , , and . ACM Trans. Reconfigurable Technol. Syst., 12 (2): 8:1-8:26 (2019)Experiences Building an MLIR-based SYCL Compiler., , , , , , , and . CoRR, (2023)Resource-Efficient Logarithmic Number Scale Arithmetic for SPN Inference on FPGAs., , , , , and . FPT, page 251-254. IEEE, (2019)User-driven Online Kernel Fusion for SYCL., , , , and . ACM Trans. Archit. Code Optim., 20 (2): 21:1-21:25 (June 2023)