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Portrait: A holistic computation and bandwidth balanced performance evaluation model for heterogeneous systems., , , and . Sustain. Comput. Informatics Syst., (2022)FlatProxy: A DPU-centric Service Mesh Architecture for Hyperscale Cloud-native Application., , , , , and . CoRR, (2023)Performance-asymmetry-aware scheduling for Chip Multiprocessors with static core coupling., , , , and . J. Syst. Archit., 56 (10): 534-542 (2010)Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design - A Self-Test, Self-Diagnosis, and Self-Repair-Based Approach, , and . Springer, (2023)Tetris: re-architecting convolutional neural network computation for machine learning accelerators., , , , and . ICCAD, page 21. ACM, (2018)Amphisbaena: Modeling two orthogonal ways to hunt on heterogeneous many-cores., , , and . ASP-DAC, page 394-399. IEEE, (2014)ApproxEye: Enabling approximate computation reuse for microrobotic computer vision., , , , and . ASP-DAC, page 402-407. IEEE, (2017)Orchestrator: a low-cost solution to reduce voltage emergencies for multi-threaded applications., , , and . DATE, page 208-213. EDA Consortium San Jose, CA, USA / ACM DL, (2013)SmartShuttle: Optimizing off-chip memory accesses for deep learning accelerators., , , , , , and . DATE, page 343-348. IEEE, (2018)M-IVC: Using Multiple Input Vectors to Minimize Aging-Induced Delay., , , , , and . Asian Test Symposium, page 437-442. IEEE Computer Society, (2009)