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Thermal-Aware Floorplanning and TSV-Planning for Mixed-Type Modules in a Fixed-Outline 3-D IC.

, , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (9): 1652-1664 (2021)

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Design space exploration with a cycle-accurate systemC/TLM DRAM controller model., , , , , , and . VLSI-DAT, page 1-4. IEEE, (2017)Thermal-Aware Floorplanning and TSV-Planning for Mixed-Type Modules in a Fixed-Outline 3-D IC., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (9): 1652-1664 (2021)Tile-Based Architecture Exploration for Convolutional Accelerators in Deep Neural Networks., , , , , , and . AICAS, page 1-4. IEEE, (2021)A 90nm 103.14 TOPS/W Binary-Weight Spiking Neural Network CMOS ASIC for Real-Time Object Classification., , , and . DAC, page 1-6. IEEE, (2020)Optimization of AI SoC with Compiler-assisted Virtual Design Platform., , , , and . ISPD, page 187-193. ACM, (2023)Content-aware line-based power modeling methodology for image signal processor., , , , and . SoCC, page 346-350. IEEE, (2017)Full System Emulation of Embedded Heterogeneous Multicores Based on QEMU., , , and . ICPADS, page 771-778. IEEE, (2018)Fault Modeling and Testing of Memristor-Based Spiking Neural Networks., , , , and . ITC, page 92-99. IEEE, (2022)Fast Steady-State Thermal Analysis., , , , , and . ISOCC, page 15-16. IEEE, (2018)Application specific component-service-aware trace generation on Android-QEMU., , , , , , and . SoCC, page 316-321. IEEE, (2017)