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Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization.

S. Rai, W. Neto, Y. Miyasaka, X. Zhang, M. Yu, Q. Yi, M. Fujita, G. Manske, M. Pontes, L. da Rosa, M. de Aguiar, P. Butzen, P. Chien, Y. Huang, H. Wang, J. Jiang, J. Gu, Z. Zhao, Z. Jiang, D. Pan, B. Abreu, I. de Souza Campos, A. Berndt, C. Meinhardt, J. Carvalho, M. Grellert, S. Bampi, A. Lohana, A. Kumar, W. Zeng, A. Davoodi, R. Topaloglu, Y. Zhou, J. Dotzel, Y. Zhang, H. Wang, Z. Zhang, V. Tenace, P. Gaillardon, A. Mishchenko, and S. Chatterjee. DATE, page 1026-1031. IEEE, (2021)

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Yukio Matsudo

Masahide Miyasaka

Yukio Yamanaka

Yukio Kamizuru

Yukio Ozawa

Other publications of authors with the same name

Logic Synthesis for Generalization and Learning Addition.Y. Miyasaka, X. Zhang, M. Yu, Q. Yi, and M. Fujita. DATE, page 1032-1037. IEEE, (2021)SAT-Based Data-Flow Mapping Onto Array Processor.Y. Miyasaka, and M. Fujita. VLSI-SOC, page 22-27. IEEE, (2020)Synthesis and Generalization of Parallel Algorithms Considering Communication Constraints.A. Goda, Y. Miyasaka, A. Gharehbaghi, and M. Fujita. ISQED, page 123-128. IEEE, (2020)Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization.S. Rai, W. Neto, Y. Miyasaka, X. Zhang, M. Yu, Q. Yi, M. Fujita, G. Manske, M. Pontes, L. da Rosa and 31 other author(s). DATE, page 1026-1031. IEEE, (2021)Synthesis of Algorithm Considering Communication Structure of Distributed/Parallel Computing.Y. Miyasaka, A. Mittal, and M. Fujita. ISQED, page 45-51. IEEE, (2019)Synthesis and Optimization of Multiple Portions of Circuits for ECO based on Set-Covering and QBF Formulations.M. Fujita, Y. Kimura, X. Le, Y. Miyasaka, and A. Gharehbaghi. DATE, page 744-749. IEEE, (2020)Live Demonstration: Automatic Synthesis of Algorithms on Multi Chip/FPGA with Communication Constraints.T. Maruoka, Y. Miyasaka, A. Goda, A. Gharehbaghi, and M. Fujita. ISCAS, page 1. IEEE, (2019)Parallel Scheduling Attention Mechanism: Generalization and Optimization.M. Yu, Y. Miyasaka, and M. Fujita. IPSJ Trans. Syst. LSI Des. Methodol., (2022)SAT-Based Mapping of Data-Flow Graphs onto Coarse-Grained Reconfigurable Arrays.Y. Miyasaka, M. Fujita, A. Mishchenko, and J. Wawrzynek. VLSI-SoC (Selected Papers), volume 621 of IFIP Advances in Information and Communication Technology, page 113-131. Springer, (2020)Synthesis and Generalization of Parallel Algorithm for Matrix-vector Multiplication.Y. Miyasaka, A. Goda, A. Mittal, and M. Fujita. IPSJ Trans. Syst. LSI Des. Methodol., (2020)

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Disambiguation of "Miyasaka, Yukio"

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Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization.

Please choose a person to relate this publication to

Yukio Matsudo

Masahide Miyasaka

Yukio Yamanaka

Yukio Kamizuru

Yukio Ozawa

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Miyasaka, Yukio"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization.

Please choose a person to relate this publication to

Yukio Matsudo

Masahide Miyasaka

Yukio Yamanaka

Yukio Kamizuru

Yukio Ozawa

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization.