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HARDSEA: Hybrid Analog-ReRAM Clustering and Digital-SRAM In-Memory Computing Accelerator for Dynamic Sparse Self-Attention in Transformer.

S. Liu, C. Mu, H. Jiang, Y. Wang, J. Zhang, F. Lin, K. Zhou, Q. Liu, and C. Chen. IEEE Trans. Very Large Scale Integr. Syst., 32 (2): 269-282 (February 2024)

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Zhou Zhou

Rui Zhou

Yayun Zhou

Yaming Zhou

Other publications of authors with the same name

A 1T2R1C ReRAM CIM Accelerator With Energy-Efficient Voltage Division and Capacitive Coupling for CNN Acceleration in AI Edge Applications.D. Chen, Z. Guo, J. Fang, C. Zhao, J. Jiang, K. Zhou, H. Tian, X. Xiong, X. Xue, and X. Zeng. IEEE Trans. Circuits Syst. II Express Briefs, 70 (1): 276-280 (2023)A 28 nm 512 Kb adjacent 2T2R RRAM PUF with interleaved cell mirroring and self-adaptive splitting for high density and low BER cryptographic key in IoT devices.J. Yang, R. Lin, K. Zhou, Y. Zhang, X. Xue, and H. Lv. Microelectron. J., (2022)Bit-Interleaving-Enabled 8T SRAM With Shared Data-Aware Write and Reference-Based Sense Amplifier.L. Wen, X. Cheng, K. Zhou, S. Tian, and X. Zeng. IEEE Trans. Circuits Syst. II Express Briefs, 63-II (7): 643-647 (2016)Nonvolatile Crossbar 2D2R TCAM with Cell Size of 16.3 F2 and K-means Clustering for Power Reduction.K. Zhou, X. Xue, J. Yang, X. Xu, H. Lv, M. Wang, M. e Jing, W. Liu, X. Zeng, S. Chung and 2 other author(s). A-SSCC, page 135-138. IEEE, (2018)An Energy Efficient Computing-in-Memory Accelerator With 1T2R Cell and Fully Analog Processing for Edge AI Applications.K. Zhou, C. Zhao, J. Fang, J. Jiang, D. Chen, Y. Huang, M. e Jing, J. Han, H. Tian, X. Xiong and 3 other author(s). IEEE Trans. Circuits Syst. II Express Briefs, 68 (8): 2932-2936 (2021)High-Density 3-D Stackable Crossbar 2D2R nvTCAM With Low-Power Intelligent Search for Fast Packet Forwarding in 5G Applications.K. Zhou, X. Xue, J. Yang, X. Xu, H. Lv, M. e Jing, J. Li, X. Zeng, and M. Liu. IEEE J. Solid State Circuits, 56 (3): 988-1000 (2021)A 2D2R ReRAM CIM accelerator for multilayer perceptron in visual classification applications.K. Zhou, R. Lin, Z. Guo, Y. Liu, J. Jiang, C. Zhao, J. Fang, X. Xu, X. Xue, and X. Zeng. Microelectron. J., (2022)A 28 nm 81 Kb 59-95.3 TOPS/W 4T2R ReRAM Computing-in-Memory Accelerator With Voltage-to-Time-to-Digital Based Output.K. Zhou, X. Jia, C. Zhao, X. Zhang, G. Wu, C. Mu, H. Zhu, Y. Ding, C. Chen, X. Xue and 2 other author(s). IEEE J. Emerg. Sel. Topics Circuits Syst., 12 (4): 846-857 (2022)Multicore Spiking Neuromorphic Chip in 180-nm With ReRAM Synapses and Digital Neurons.H. Jiang, J. Lu, C. Zhang, S. Tang, J. An, L. Cheng, J. Lu, J. Wei, K. Zhou, X. Zhang and 2 other author(s). IEEE J. Emerg. Sel. Topics Circuits Syst., 13 (4): 975-985 (December 2023)Toward Practical Temporal Diversity Coherent Combining Based Variable Data-Rate Free Space Optical Communication Systems.F. Li, S. Cui, Y. Chen, C. Rao, Y. Tu, K. Zhou, and D. Liu. IEEE Access, (2022)

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Disambiguation of "Zhou, Keji"

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HARDSEA: Hybrid Analog-ReRAM Clustering and Digital-SRAM In-Memory Computing Accelerator for Dynamic Sparse Self-Attention in Transformer.

Please choose a person to relate this publication to

Zhou Zhou

Zhou Zhou

Rui Zhou

Yayun Zhou

Yaming Zhou

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Zhou, Keji"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML HARDSEA: Hybrid Analog-ReRAM Clustering and Digital-SRAM In-Memory Computing Accelerator for Dynamic Sparse Self-Attention in Transformer.

Please choose a person to relate this publication to

Zhou Zhou

Zhou Zhou

Rui Zhou

Yayun Zhou

Yaming Zhou

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
BibTeX
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APA
Chicago
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HARDSEA: Hybrid Analog-ReRAM Clustering and Digital-SRAM In-Memory Computing Accelerator for Dynamic Sparse Self-Attention in Transformer.