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Automatic rule registration and deletion function on a packet lookup engine LSI.

, , , and . ISPACS, page 1-6. IEEE, (2016)

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A Parallel Branching Program Machine for Emulation of Sequential Circuits., , , and . ARC, volume 5453 of Lecture Notes in Computer Science, page 261-267. Springer, (2009)Automatic rule registration and deletion function on a packet lookup engine LSI., , , and . ISPACS, page 1-6. IEEE, (2016)A Quaternary Decision Diagram Machine and the Optimization of its Code., , , , and . ISMVL, page 362-369. IEEE Computer Society, (2009)A broadband Rx band noise reduction circuit with CMOS switch for multi-band power amplifier., , , , , , , , , and . RWS, page 165-167. IEEE, (2015)The LSI implementation of a memory based field programmable device for MCU peripherals., , , , , , and . DDECS, page 183-188. IEEE Computer Society, (2014)A virus scanning engine using a parallel finite-input memory machine and MPUs., , , and . FPL, page 635-639. IEEE, (2009)A 100-MHz 51.2-Gb/s packet lookup engine LSI based on missmatch detection circuit combined with linked-list hash table., , , , , and . ISPACS, page 351-356. IEEE, (2015)The Parallel Sieve Method for a Virus Scanning Engine., , , and . DSD, page 809-816. IEEE Computer Society, (2009)