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Pre-layout estimation of performance and design of basic analog circuits in stress enabled technologies.

, , , , and . VDAT, page 1-6. IEEE Computer Society, (2015)

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An energy-efficient variation aware self-correcting latch., , , and . Microelectron. J., (2019)Pre-layout estimation of performance and design of basic analog circuits in stress enabled technologies., , , , and . VDAT, page 1-6. IEEE Computer Society, (2015)An empirical delta delay model for highly scaled CMOS inverter considering Well Proximity Effect., , , and . VDAT, page 1-2. IEEE, (2014)An efficient methodology to characterize the TSPC flip flop setup time for static timing analysis., , and . SMACD, page 1-4. IEEE, (2016)Characteristics and Outcomes of Hospitalized Young Adults with Mild to Moderate Covid-19 at a University Hospital in India, , , , , , , , and . (June 2020)Addressing image and Poisson noise deconvolution problem using deep learning approaches., , , , and . Comput. Intell., 39 (4): 577-591 (August 2023)Saksham: Customizable x86 Based Multi-Core Microprocessor Simulator., , and . CICSyN, page 220-225. IEEE Computer Society, (2009)Timing model for two stage buffer and its application in ECSM characterization., , , , and . VDAT, page 1-6. IEEE Computer Society, (2015)From Specification to Silicon: Towards Analog/Mixed-Signal Design Automation using Surrogate NN Models with Transfer Learning., , , , , , , , , and 5 other author(s). ICCAD, page 1-9. IEEE, (2021)Efficient static D-latch standard cell characterization using a novel setup time model., , , and . ISQED, page 371-378. IEEE, (2015)