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Disambiguation of "Ramji, Shyam"

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MAPLE: multilevel adaptive placement for mixed-size designs.

, , , , and . ISPD, page 193-200. ACM, (2012)

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Shyam Jani

Dhirajlal Shyamani

Shyam Jhanjee

Shyam Bandari

Shyam Jhanjee

 

Other publications of authors with the same name

Pin Assignment Using Stochastic Local Search Constraint Programming., , , , , and . CP, volume 5732 of Lecture Notes in Computer Science, page 35-49. Springer, (2009)Parameterized free space redistribution for engineering change in placement of integrated circuits., , , and . ICCD, page 401-406. IEEE Computer Society, (2012)Self-Aligned Double-Patterning Aware Legalization., , , , and . DATE, page 1145-1150. IEEE, (2020)DRC Hotspot Prediction at Sub-10nm Process Nodes Using Customized Convolutional Network., , , , , , and . ISPD, page 135-142. ACM, (2020)CodeNet: A Large-Scale AI for Code Dataset for Learning a Diversity of Coding Tasks., , , , , , , , , and 7 other author(s). NeurIPS Datasets and Benchmarks, (2021)Design topology aware physical metrics for placement analysis., and . ACM Great Lakes Symposium on VLSI, page 186-191. ACM, (2003)MAPLE: multilevel adaptive placement for mixed-size designs., , , , and . ISPD, page 193-200. ACM, (2012)Challenges in managing timing and wiring contracts during hierarchical floorplanning and design closure.. ISPD, page 182. ACM, (2013)ITOP: integrating timing optimization within placement., , , , , , and . ISPD, page 83-90. ACM, (2010)Design Rule Violation Prediction at Sub-10-nm Process Nodes Using Customized Convolutional Networks., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (10): 3503-3514 (2022)