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Enabling energy efficient Hybrid Memory Cube systems with erasure codes., , , and . ISLPED, page 67-72. IEEE, (2015)AxMAP: Making Approximate Adders Aware of Input Patterns., , , and . IEEE Trans. Computers, 69 (6): 868-882 (2020)A Fast Two Dimensional Deblocking Filter for H.264/AVC Video Coding., , and . CCECE, page 2017-2020. IEEE, (2006)Content Aware Refresh: Exploiting the Asymmetry of DRAM Retention Errors to Reduce the Refresh Frequency of Less Vulnerable Data., , , and . IEEE Trans. Computers, 68 (3): 362-374 (2019)Compressed Geometric Arrays for Point Cloud Processing., and . CoRR, (2021)A programmable memory controller for the DDRx interfacing standards., and . ACM Trans. Comput. Syst., 31 (4): 11 (2013)An Efficient Self-Transposing Memory Structure for 32-bit Video Processors., , , and . APCCAS, page 1438-1441. IEEE, (2006)Dual Mode Architecture for Deblocking Filtering in H.264/AVC Video Coding., , and . APCCAS, page 1745-1748. IEEE, (2006)R-Cache: A Highly Set-Associative In-Package Cache Using Memristive Arrays., , and . ICCD, page 423-430. IEEE Computer Society, (2018)ReTagger: An Efficient Controller for DRAM Cache Architectures., and . DAC, page 196. ACM, (2019)