Author of the publication

Applicability of Well-Established Memristive Models for Simulations of Resistive Switching Devices.

, , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (8): 2402-2410 (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A Complementary Resistive Switch-based Crossbar Array Adder., , , and . CoRR, (2014)The Programmable Logic-in-Memory (PLiM) computer., , , , , , and . DATE, page 427-432. IEEE, (2016)Requirements and Challenges for Modelling Redox-based Memristive Devices., , , and . ISCAS, page 1-5. IEEE, (2018)Simulation of TaOx-based complementary resistive switches by a physics-based memristive model., , , , , and . ISCAS, page 1420-1423. IEEE, (2014)On the origin of the fading memory effect in ReRAMs., , , , , , and . PATMOS, page 1-5. IEEE, (2017)Study of Memristive Associative Capacitive Networks for CAM Applications., , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 5 (2): 153-161 (2015)Efficient complementary resistive switch-based crossbar array Booth multiplier., , , and . Microelectron. J., (2017)Variability-Aware Modeling of Filamentary Oxide-Based Bipolar Resistive Switching Cells Using SPICE Level Compact Models., , , , , , , , and . IEEE Trans. Circuits Syst., 67-I (12): 4618-4630 (2020)Implementation of Multinary Łukasiewicz Logic Using Memristive Devices., , , and . ISCAS, page 1-5. IEEE, (2021)In-memory adder functionality in 1S1R arrays., , , , and . ISCAS, page 1338-1341. IEEE, (2015)