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High performance reconfigurable computing for numerical simulation and deep learning.

, , , , , and . CCF Trans. High Perform. Comput., 2 (2): 196-208 (2020)

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FP-BNN: Binarized neural network on FPGA., , , , and . Neurocomputing, (2018)Neuromorphic Design Using Reward-based STDP Learning on Event-Based Reconfigurable Cluster Architecture., , , and . ICONS, page 5:1-5:8. ACM, (2021)Roundoff-noise shaping in filter design., , and . ISCAS, page 57-60. IEEE, (2000)Exploring Machine Learning Adoption in Customisable Processor Design., , , and . ASICON, page 1-4. IEEE, (2023)Towards an embedded biologically-inspired machine vision processor., , , and . FPT, page 273-278. IEEE, (2010)Optimizing Reconfigurable Recurrent Neural Networks., , , , , , , and . FCCM, page 10-18. IEEE, (2020)Towards an Efficient Accelerator for DNN-Based Remote Sensing Image Segmentation on FPGAs., and . FPL, page 187-193. IEEE, (2019)Customisable architectures for the set covering problem., , and . SIGARCH Comput. Archit. News, 41 (5): 101-106 (2013)Hardware Acceleration for an Accurate Stereo Vision System Using Mini-Census Adaptive Support Region., , , , , , and . ACM Trans. Embed. Comput. Syst., 13 (4s): 132:1-132:24 (2014)Implementing Graphics Shaders Using FPGAs., and . FPL, volume 3203 of Lecture Notes in Computer Science, page 1173. Springer, (2004)